Research Projects

PyLog: A High-Level Programming and Synthesis Flow for FPGAs

PyLog is a high-level, Python-based algorithm-centric programming and synthesis flow for FPGA. PyLog features a set of compiler optimization passes and a type inference system to generate high-quality design.

CARMA: Context-Aware Runtime Reconfiguration for Energy-Efficient Sensor Fusion

CARMA is a context-aware sensor fusion approach that uses context to dynamically reconfigure the computation flow on a field-programmable gate array (FPGA) at runtime. By clock gating unused sensors and model sub-components, CARMA significantly reduces the energy used by a multi-sensory object detector without compromising performance.