We are a group of passionate researchers at EECS, School of Engineering, UC Irvine, working on exciting research projects related to CORSA: Compiler Optimizations, Reconfigurable and Scalable Architectures.

We focus on the development of highly efficient and user-friendly hardware acceleration systems. Our core areas of expertise encompass the design of cutting-edge programming languages and compilers tailored for hardware accelerators, as well as the envisioning of next-generation computer architectures. Additionally, we are committed to exploring and implementing highly efficient machine learning algorithms and model compression techniques. Moreover, our research extends to innovative hardware-awarded neural architecture search and the integration of hardware/software co-design flow. Through these pursuits, we aim to advance the frontiers of technology and contribute to the advancement of the field.

If you are interested in opportunities at CORSA lab, please contact Prof. Sitao Huang (sitaoh@uci.edu).

Dr. Sitao Huang
Assistant Professor, CORSA Lab Director
Email: sitaoh@uci.edu
Office: Engineering Hall 3225